<i id="3fl7v"><thead id="3fl7v"></thead></i>

        <big id="3fl7v"></big>
          <big id="3fl7v"></big>
          <big id="3fl7v"></big>

            <big id="3fl7v"><address id="3fl7v"><thead id="3fl7v"></thead></address></big>

                      | HITACHI HOME | UP | SEARCH | HITACHI

                      News Release

                      25 July 1996

                      Hitachi Expands SR2201 Series
                      of Parallel Computers with
                      High-end and Compact Models

                      - High-end model is world's fastest -

                      Hitachi, Ltd. today expands the lineup of its SR2201 parallel computer series with the release of a high-end model and a compact model. In its maximum configuration with 2048 processing elements, the high-end model is capable of approximately 600 GFLOPS, ranking it as the world's fastest computer, as measured by the LINPACK benchmark test.

                      Intended for scientific research applications, the compact model can be configured with from eight to a maximum of 64 processing elements, for a performance ranging from approximately 2.4 GFLOPS to approximately 19.2 GFLOPS. By reducing the number of components, the compact model takes up about 60% less space and is about 40 % shorter in height compared to the previous models.

                      The SR2201 supports the pseudo-vector processing facility developed by Hitachi which speeds up the data processing capabilities of RISC processors, therefore allowing effective utilization of the system's high-speed performance.

                      For its operating system, the SR2201 uses HI-UX/MPP based on the Mach 3.0 UNIX micro-kernel supplemented by enhanced parallel processing and operating support functions.

                      [Specifications]
                      Compact modelHigh-end model
                      Configuration
                      -- Processors8 to 6432 to 2,048
                      -- Network topologyCrossbar-network
                      -- Processor-processor transmission rate300 megabytes/s
                      -- Maximum total memory capacity 64 gigabytes 2 terabytes
                      Processors
                      -- Performance0.3 GFLOPS
                      -- Memory capacity64/128/256/512/1024 megabytes
                      -- Cache memory Primary: 16 kB (instruction)16 kB (data)
                      -- Cache memory Secondary: 512 kB (instruction) 512 kB (data)
                      I/O devices (disk storage system)
                      -- Internal: 4.3 gigabytes/drive 2.1 gigabytes/drive
                      -- Disk-arrays:Max. 66.6 gigabytes (RAID 5 array)

                      [Availability and Pricing]

                      Availability:September 1996 (Compact model)
                      December 1996 (High-end model / 2,048PE configuration)
                      Pricing:From 1.5 million/month yen(Compact model)
                      From 5 million/month yen (High-end model)

                      Notes:

                      1. Mach was developed by Carnegie Mellon University.
                      2. UNIX is a registered trademark of X/Open Company Limited in the U.S. and other countries.


                      All Rights Reserved, Copyright (C) 1995, 1996, Hitachi, Ltd.
                      WRITTEN BY Secretary's Office

                          <i id="3fl7v"><thead id="3fl7v"></thead></i>

                            <big id="3fl7v"></big>
                              <big id="3fl7v"></big>
                              <big id="3fl7v"></big>

                                <big id="3fl7v"><address id="3fl7v"><thead id="3fl7v"></thead></address></big>

                                          ΢ּ